From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: * X-Spam-Status: No, score=1.3 required=5.0 tests=BAYES_00,INVALID_MSGID, MSGID_RANDY autolearn=no autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 103376,971598a9377a949a X-Google-Attributes: gid103376,public From: Ada2001 Subject: Re: CPU recommendations from an Ada perspective? Date: 1999/11/08 Message-ID: <8075qa$cie$1@nnrp1.deja.com>#1/1 X-Deja-AN: 545982563 References: X-Http-Proxy: 1.0 x34.deja.com:80 (Squid/1.1.22) for client 205.175.225.5 Organization: Deja.com - Before you buy. X-Article-Creation-Date: Mon Nov 08 18:46:35 1999 GMT X-MyDeja-Info: XMYDJUIDada2001 Newsgroups: comp.lang.ada X-Http-User-Agent: Mozilla/4.51 [en]C-CCK-MCD (WinNT; U) Date: 1999-11-08T00:00:00+00:00 List-Id: In article , "Mike Silva" wrote: > I'm reluctant to ask this question because it's so vague at this > point, but my curiosity has won out. I'd like to hear any > recommendations for (or against) those 32 bit CPU families which are > supported by good Ada tools. The PowerPC architecture seems to be supported by almost all Ada compiler vendors. However I've been curious about a somewhat different question: Which currently popular CPU family, if any, has an architecture that is especially well suited for Ada code generation? My company still uses a proprietary 16-bit stack architecture CPU that was designed with Ada in mind and it works very well for us. I've read Tucker Taft's paper on compiling Ada into Java byte codes. I came away with the impression that, while it is possible to do, the JVM is not an optimal architecture for Ada. I'm currently working on start-up code for an Intel 80386EX bare-machine target and it's no fun at all. It seems every Intel chip, even a Pentium III, has to act like an 8088 on power-up for reasons of backward compatibility with DOS and the original PC architecture. The start-up code needed to configure the chip for 32-bit flat-memory operation is rather intricate. [BTW: the best description I've seen of the awkwardness of the Intel architecture is in Robert Dewar's "Microprocessors: A Programmers View" book. I was able to get a copy from a used book store. Is there any chance of an updated second edition, Dr. Dewar? :) ]. F. Britt Snodgrass Sent via Deja.com http://www.deja.com/ Before you buy.