From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM autolearn=unavailable autolearn_force=no version=3.4.4 X-Received: by 10.13.207.129 with SMTP id r123mr3045953ywd.66.1494434716858; Wed, 10 May 2017 09:45:16 -0700 (PDT) X-Received: by 10.157.34.229 with SMTP id y92mr148605ota.15.1494434716811; Wed, 10 May 2017 09:45:16 -0700 (PDT) Path: eternal-september.org!reader01.eternal-september.org!reader02.eternal-september.org!news.eternal-september.org!news.eternal-september.org!feeder.eternal-september.org!news.glorb.com!t26no262365qtg.1!news-out.google.com!v18ni910ita.0!nntp.google.com!c26no431100itd.0!postnews.google.com!glegroupsg2000goo.googlegroups.com!not-for-mail Newsgroups: comp.lang.ada Date: Wed, 10 May 2017 09:45:16 -0700 (PDT) In-Reply-To: Complaints-To: groups-abuse@google.com Injection-Info: glegroupsg2000goo.googlegroups.com; posting-host=2601:191:8303:2100:4c0f:e82:ed51:5ed8; posting-account=fdRd8woAAADTIlxCu9FgvDrUK4wPzvy3 NNTP-Posting-Host: 2601:191:8303:2100:4c0f:e82:ed51:5ed8 References: <0fc56bf7-1cfa-4776-9c47-a573db315c5f@googlegroups.com> <7b0c08eb-be62-4d14-ae99-cad038ad0a62@googlegroups.com> <077e7f6a-5a7b-4b88-a16f-7672aec18a17@googlegroups.com> User-Agent: G2/1.0 MIME-Version: 1.0 Message-ID: <7ea65c9e-b5a7-4531-a568-66c87da1f78a@googlegroups.com> Subject: Re: Portable memory barrier? From: Robert Eachus Injection-Date: Wed, 10 May 2017 16:45:16 +0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Xref: news.eternal-september.org comp.lang.ada:46747 Date: 2017-05-10T09:45:16-07:00 List-Id: On Wednesday, May 10, 2017 at 3:13:27 AM UTC-4, Dmitry A. Kazakov wrote: > But you don't need elements atomic only index has to. If I understood=20 > Randy's explanation correctly atomic access to the buffer index will=20 > give you the barrier between index and element accesses which is all=20 > that is required. That is my reading as well, and should result in efficient implementations.= Also, for portable code, there are times when Volatile is required. But = you really need ancient (in Internet years) hardware for Volatile to have a= ny effect at all. (At least in non-erroneous programs.) In general, Atomic= should be implemented as a RMW (read-modify-write) instruction on x86, and= will add fences on any hardware that requires them. The other part, which occurs in this code, is that (user) Atomic variables = should only be written by one task/thread. Hmm. Compiler back-ends should= probably insert a RMW of a non-program variable to cause synchronization w= here an Atomic variable is only being read. Of course, this would only eli= minate most erroneous executions. Best is for programmers to use protected= objects which can correctly (in an interrupt protected way) use RMWs for s= ynchronization. =20