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From: butcher@iig.com.au (Ian Swinkels)
Subject: High Precision timing
Date: 1997/04/09
Message-ID: <5iddnc$57u@news.mel.aone.net.au>#1/1
X-Deja-AN: 231533231
Organization: Customer of Access One Pty Ltd, Melbourne, Australia
Newsgroups: comp.lang.ada
Date: 1997-04-09T00:00:00+00:00
List-Id: <comp.lang.ada>


Hi all!

This is a question that is perhaps more hardware related, but here
goes anyway....

The IBM PC has a hardware timer that is 8253 compatable(embedded- you
know what I mean in that its not a single chip anymore). There are 3
timer channels.

The first is hooked to INT 0 to cause system ticks, resulting in the
execution of code at the 1C int vect.

The third is used in the generation, and its output is controled by
the 8255 programable interface controler.

Can anyone tell me if I can stuff around with the second timer without
causing system crashes?(all I have achieved so far).

At present I am using timer 1, speed up to do some timing, and timer 3
to control an output device. My code works reliably. 

What I want to do with channel 2 is to use it as a 1uS resolution
counter which can be software triggered, latched, read, and then
restarted.  The reason I want to do this is to free the CPU time that
I loose to performing timing with timer 1, plus the obvious benefit of
1uS accuracy.

Any takers to this curly question? Oh and if there is a solution, I
would very much appreciated some ASM code/pointers in the right
direction, to do this to timer 2. 

Thanks one and all.

Ian Swinkels.