From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM autolearn=unavailable autolearn_force=no version=3.4.4 Path: buffer1.nntp.dca1.giganews.com!border1.nntp.dca1.giganews.com!nntp.giganews.com!goblin1!goblin.stu.neva.ru!proxad.net!feeder1-2.proxad.net!cleanfeed3-b.proxad.net!nnrp1-2.free.fr!not-for-mail From: =?iso-8859-1?b?RnLpZOlyaWM=?= Praca Subject: Representation clauses and side-efects on STM32F411 ravenscar runtime Newsgroups: comp.lang.ada User-Agent: Pan/0.139 (Sexual Chocolate; GIT bf56508 git://git.gnome.org/pan2) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Date: 02 Aug 2015 08:59:15 GMT Message-ID: <55bddbe2$0$3384$426a74cc@news.free.fr> Organization: Guest of ProXad - France NNTP-Posting-Date: 02 Aug 2015 10:59:15 CEST NNTP-Posting-Host: 94.71.68.35 X-Trace: 1438505955 news-1.free.fr 3384 94.71.68.35:57870 X-Complaints-To: abuse@proxad.net Xref: number.nntp.giganews.com comp.lang.ada:194628 Date: 2015-08-02T10:59:15+02:00 List-Id: Hello guys, I'm currently playing with the Ravenscar runtime for STM32. More precisely, I have a Nucleo card which has a STM32F411 processor. For this, I found this runtime (https://github.com/nickpascucci/ravenscar- sfp-stm32f411-nucleo ) and decided to experiment few changes by using representation clauses instead of playing with bits which I find to be error prone. My problem is that when using simple assignments on a record component, I have other bits touched by this assignment. For example, with the following declaration: type Mantissa is range 0 .. 2**12 - 1 with Size => 12; type Fraction is range 0 .. 2**4 - 1 with Size => 4; type Baud_Rate_Register is record DIV_Fraction : Fraction; DIV_Mantissa : Mantissa; end record with Size => 32; for Baud_Rate_Register use record DIV_Fraction at 0 range 0 .. 3; DIV_Mantissa at 0 range 4 .. 15; end record; If I write USART2.BRR.DIV_Mantissa := 16#445#; USART2.BRR.DIV_Fraction := 16#c#; A memory dump shows the final content to be 0x00005c5c whereas intermediary result was 0x00004450 as expected. n the other hand, if I write USART2.BRR := Baud_Rate_Register'(DIV_Mantissa => 16#445#, DIV_Fraction => 16#c#); There is no problem, the final content is 0x0000445c as expected. Did someone experience such kind of behaviour with STM32 class micro- controllers ? Could it be related to the fact that the datasheet specified that 16-bit records should be written/accessed by 16-bit (Litteraly, "The peripheral registers have to be accessed by half-words (16 bits) or words (32 bits)") ? I was expecting the compiler (GNAT GPL 2014 (20140331) from Adacore under Linux x64) to handle all and, or and xor operations by itself for such kind of representation. Was I wrong ? Thanks for the clarification. Fred