From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=BAYES_40,INVALID_MSGID autolearn=no autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 109fba,99e2dadd49ce1936 X-Google-Attributes: gid109fba,public X-Google-Thread: f8131,eb3e9661312f3b5e X-Google-Attributes: gidf8131,public X-Google-Thread: 101deb,bae41b8b09f58ec1 X-Google-Attributes: gid101deb,public X-Google-Thread: 1108a1,99e2dadd49ce1936 X-Google-Attributes: gid1108a1,public X-Google-Thread: 103376,99e2dadd49ce1936 X-Google-Attributes: gid103376,public X-Google-Thread: 107d55,99e2dadd49ce1936 X-Google-Attributes: gid107d55,public From: rav@goanna.cs.rmit.edu.au (Robin Vowels) Subject: Re: Exception Handling Date: 1996/10/07 Message-ID: <539ol1$hvi$1@goanna.cs.rmit.edu.au>#1/1 X-Deja-AN: 187225719 expires: 1 January 1997 00:00:00 GMT distribution: inet references: <323750EA.167E@maths.usyd.edu.au> <51jtet$16qc@watnews1.watson.ibm.com> <525m1s$jvh@goanna.cs.rmit.edu.au> <3247E388.243A@ix.netcom.com> <32529a13.6465307@nntp.netgate.net> organization: Comp Sci, RMIT, Melbourne, Australia newsgroups: comp.object,comp.lang.java.tech,comp.lang.c++,comp.lang.ada,comp.lang.asm370,comp.lang.pl1 nntp-posting-user: rav Date: 1996-10-07T00:00:00+00:00 List-Id: Fritz@Peacham.com (Fritz Schneider) writes: >Bob Halpern wrote: >>Robin Vowels wrote: >>> >|> Where did the concept of exception handling originate ? For example, >>> >|> which languages were first to support this, or which papers first >>> >|> proposed exception handling ? >>> >>> The IBM System 360 (c. 1965) had an interrupt system that could >>> trap a range of computational conditions (division by >> >>There was hardware and software for exception handling that predated the >>360. >The IBM 709 (a vacuum tube machine) introduced the concept of data >channels (now called DMA) in a commercial product ca. 1957. This >included interruptions, referred to in that architecture as traps. The >current instruction address was stored in a fixed location and control >was given to the channel trap routine which stored the registers and >processed the interruption. The instruction set included the TTR (TRAP >TRANSFER) instruction used to return from interruptions. It could not >be trapped, so the next interruption would occur back in the user >program rather than in the trap routine. >Fritz Schneider >Peacham Cybernetics >Sunnyvale, California Thanks for that info. As far as DMA goes, the English Electric DEUCE computer (c. 1955) performed asynchronous transfer between drum and main memory. I think that the ACE computer (c. 1950) did also.