From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00,DIET_1,INVALID_MSGID autolearn=no autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 10f5bc,5d6f85246966eb2e X-Google-Attributes: gid10f5bc,public X-Google-Thread: 109fba,5d6f85246966eb2e X-Google-Attributes: gid109fba,public X-Google-Thread: 103376,5d6f85246966eb2e X-Google-Attributes: gid103376,public X-Google-Thread: 115aec,5d6f85246966eb2e X-Google-Attributes: gid115aec,public From: mueller@informatik.hu-berlin.de (Frank Mueller) Subject: Re: For GNAT People Date: 1996/07/25 Message-ID: <4t7l8s$d8p@hahn.informatik.hu-berlin.de>#1/1 X-Deja-AN: 170077350 references: <31F5FF33.167EB0E7@pisa.intecs.it> organization: Humboldt-Universitaet zu Berlin newsgroups: comp.realtime,comp.lang.ada,comp.lang.c++,comp.software.testing originator: mueller@eiche Date: 1996-07-25T00:00:00+00:00 List-Id: In article <31F5FF33.167EB0E7@pisa.intecs.it>, grt writes: > After the development phase it is easy to measure the required times, > but we would like to be able to perform the analysis BEFORE all code > is produced and without exercising the specific hardware. At this > purpose it is needed a so called Worst Case Execution Time > Analyser. It is a tool able to estimate with a high degree of > confidence the execution time given the source code statements. My > company's role includes the development of such a tool. > > Being GNAT one of the candidate Compilation System I am interested to > know your opininion about the level of support we can have from the I've been involved in worst-case execution time (WCET) estimation for some time. In short, it's not ready for production use yet. Many hardware aspects require analysis at the processor cycle level (pipelines, caches, superscalar). Our approach has been to design a tool set for static analysis of programs (tasks or smaller pieces of code, e.g. loops) wrt. WCET and a certain architecture. The RTSS and RTAS conferences cover some of the on-going work. We used the VPCC/VPO compiler which uses RTLs just like GNAT/GCC. We enhanced this instruction-level analysis by hardware-specific information (pipeline structure, miss penalty, cache configuration...) Our system produced estimates in a very short time (compared to other approaches, e.g. using ILP) and overestimates the WCET by about 10%, assuming that loop bounds are known etc. I'm currently working together with FSU (Florida State University), TU Wien and Chalmers U. on some issue. My main focus has been the problem of instruction caching. Check out http://www.informatik.hu-berlin.de/mueller/publications.html and http://www.cs.fsu.edu/~whalley -- Frank Mueller E-Mail: mueller@informatik.hu-berlin.de WWW: http://www.informatik.hu-berlin.de/~mueller