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From: jens.hansson@mailbox.swipnet.se (Jens Hansson)
Subject: Re: ADA - VHDL
Date: 1996/07/11
Message-ID: <4s3sg5$125@mn5.swip.net>#1/1
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references: <31E2391F.A16BEBD@sh.bel.alcatel.be>
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newsgroups: comp.lang.ada,comp.lang.vhdl
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Date: 1996-07-11T00:00:00+00:00
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In article <31E2391F.A16BEBD@sh.bel.alcatel.be>, cnuddep@sh.bel.alcatel.be 
says...
>
>Hello,
>
>As a "experienced" VHDL programmer and now looking for the
>first time really into ADA I have some historical questions
>and I hoped that somebody on those two newsgroups could help me
>making some points more clear.
>
>I agree there are a lot of similarities between the languages, but I do
>not understand the reason for many differences. There are things which 
>I can not do in VHDL which I can in ADA and for which I see no reason.
> some examples: 
>        type new Integer;
>        generics;
>        variant records
>
>on the other hand there are also points which are more flexible in VHDL
>        
>I also see no reason for some syntax differences ("to" in VHDL, ".." in ADA)
>
>I agree the differences may be small but to my oppinion it will cause problems
>in the future where hardware-software codesign will come a reallity and a 
single
>language we be needed. I think that VHDL-ADA is a very powerfull combination 
but
>would it not be possible to get the small differences between the languages 
out of 
>way and grow to a single language capable of discribing both: VHDL-ADA-2000
>
>What are the oppinions of the experts on this point?

Disclaimer: I don't consider myself to be an expert in neither Ada nor VHDL.

Does it make sense to have the same syntax for languages with this big 
differences in semantics? A program written to be very efficient in Ada 
may be impossible or at least very inefficient to synthesize in VHDL. The 
opposite is valid as well.

Netlists (Port maps) could be used in a data driven computer architecture, but 
there are few (if any) commercial computers working this way. Timing has no 
meaning in Ada, while it is essential in VHDL, both regarding clock cycles and 
physical timing.

If you want to speed up software, decrease the number of instructions that are 
to be executed. Lots of these optimisations can be done automatically.

If you want to speed up hardware (essentially), multiply the hardware and/or 
pipeline the architecture. This changes system timing (in #clocks) and uses 
more expensive resources (area or gates), and therefore must be controlled to a 
greater extent by the "programmer".

Just my 2cents worth...

--Jens