From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.4 X-Google-Thread: 103376,379f9c2a66a5ddc8 X-Google-NewGroupId: yes X-Google-Attributes: gida07f3367d7,domainid0,public,usenet X-Google-Language: ENGLISH,ASCII-7-bit Path: g2news1.google.com!news1.google.com!border1.nntp.dca.giganews.com!nntp.giganews.com!npeer01.iad.highwinds-media.com!news.highwinds-media.com!feed-me.highwinds-media.com!nx01.iad01.newshosting.com!newshosting.com!novia!news-out.readnews.com!postnews3.readnews.com!not-for-mail Date: Mon, 13 Sep 2010 09:47:22 -0400 From: "Peter C. Chapin" User-Agent: Mozilla/5.0 (Windows; U; Windows NT 6.1; en-US; rv:1.9.2.9) Gecko/20100825 Lightning/1.0b2 Thunderbird/3.1.3 MIME-Version: 1.0 Newsgroups: comp.lang.ada Subject: Re: Question about package Interfaces. References: <4c8d7a8e$0$2408$4d3efbfe@news.sover.net> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Message-ID: <4c8e2be0$0$2414$4d3efbfe@news.sover.net> Organization: SoVerNet (sover.net) NNTP-Posting-Host: 30be22ec.news.sover.net X-Trace: DXC=]kDD8E>0M2JY2OmIRT>9jNK6_LM2JZB_CCi]jh<[EDZG:WUUlR<856O]@TPNR^CnjNEBonjgmn1KF X-Complaints-To: abuse@sover.net Xref: g2news1.google.com comp.lang.ada:14040 Date: 2010-09-13T09:47:22-04:00 List-Id: On 2010-09-12 23:54, Robert A Duff wrote: > Unsigned_8'Size = 8. But that does not mean that all objects > of subtype Unsigned_8 are 8 bits, nor that X'Size = 8 > (where "X: Unsigned_8;"). For example, an object could > be stored in a 64-bit register. > > A packed array A of Unsigned_8 will have A'Component_Size = 8, > and A(I)'Size = 8 for all I. So I have to explicitly ask for a packed array in order to get this guarantee? Is that true even if I declare a component type with an explicit representation clause requesting an 8 bit size? I guess probably. >> The reference manual does say, "For shifting, zero bits are shifted >> in..." However, it has recently come to my attention that some >> processors, such as Intel architecture machines, have shift instructions >> that mask the shift count. For example, shifting a 32 bit operand by 32 >> bits results in an actual shift of 0 bits. Does that mean >> implementations for such a system can't compile Interfaces.Shift_Left >> into a single instruction but instead have to force "unlimited" shift >> semantics on top of a hardware facility that doesn't do it that way? > > Yes, in general. However, if the compiler knows that > the shift count is in a certain range it could optimize > to a single machine instruction, even on when the hardware > does something silly (as x86 does). Okay, good to know. It's another argument in favor of sensible user defined subtypes. Thanks Peter