From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 103376,fd24e54f7983a2f1 X-Google-Attributes: gid103376,public X-Google-ArrivalTime: 1995-02-08 19:01:22 PST Path: nntp.gmd.de!newsserver.jvnc.net!howland.reston.ans.net!news.starnet.net!wupost!uhog.mit.edu!news.mathworks.com!zombie.ncsc.mil!admii!cmcl2!lab.ultra.nyu.edu!kenner From: kenner@lab.ultra.nyu.edu (Richard Kenner) Newsgroups: comp.lang.ada Subject: Re: FSF drops Apple boycott, opens gate fo Date: 9 Feb 1995 03:01:22 GMT Organization: New York University Ultracomputer Research Lab Message-ID: <3hc0i2$eia@cmcl2.NYU.EDU> References: <1995Feb7.090613.9062@eisner> <1995Feb8.114712.3756@driftwood.cray.com> NNTP-Posting-Host: lab.ultra.nyu.edu Date: 1995-02-09T03:01:22+00:00 List-Id: In article <1995Feb8.114712.3756@driftwood.cray.com> brh@cray.com writes: >There is also an rs6000 version of gcc/gnat. The rs6000 uses the power >chip set which is fairly close to the power pc instruction set. Though this is off-topic, I think I should say something about this families of architectures, since there is a lot of confusion out there (not necessarily in this thread). The POWER architecture first appeared a number of years ago in the IBM product known as the RS/6000. The processor itself didn't have a public name, but most people referered to it by its last IBM code name (RIOS). The PowerPC architecture is neither a superset nor a subset of POWER. However, the instructions present in both is a very large subset of both; i.e., the differences between the two are a relatively small number of instructions. One other difference is that the mnemonics used in the documentation of both architectures differ, even for the instructions in both; GCC has a option that says which mnemonics to use which is orthogonal (except in its default) to what architecture you're compiling for. The PowerPC architecture is a 64-bit architecture with defined subsets. All announced implementations omit the 64-bit instructions and some omit a few of floating-point instructions (that are not in the POWER architecture). You also view it as having optional supersets consisting of those instructions. What is popularly known as the "PowerPC" chip is more properly known by its Motorola part number, MPC601. This is *not* a pure PowerPC processor. In fact, it implements the *union* of the POWER architecture and the smallest defined subset of PowerPC (less the 64-bit and the extra FP instructions). GCC knows this and when compiling for the 601 (the default when you say "powerpc") it will use either POWER or PowerPC instructions, depending on which are more efficient for a particular expression. The MPC603 and MPC604 do not implement the POWER-only instructions. To make life even *more* interesting, IBM recently announced products based on the POWER2 architecture. This architecture is a superset of the POWER architecture. Some, but not all, of these added instructions are also in the optional part of the PowerPC architecture. GCC also supports POWER2. This is probably much more than most people want to know on this topic, but I thought I should straighten out the confusion.