From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00 autolearn=ham autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 103376,fd0ee7c9be011576 X-Google-Attributes: gid103376,public X-Google-ArrivalTime: 2001-03-05 17:30:08 PST Path: supernews.google.com!sn-xit-03!supernews.com!freenix!teaser.fr!nerim.net!grolier!btnet-peer0!btnet!news5-gui.server.ntli.net!ntli.net!news11-gui.server.ntli.net.POSTED!not-for-mail Message-ID: <3AA43C58.105B970D@linuxchip.demon.co.uk> From: Dr Adrian Wrigley X-Mailer: Mozilla 4.7 [en] (X11; U; Linux 2.2.14-5.0smp i686) X-Accept-Language: en MIME-Version: 1.0 Newsgroups: comp.lang.ada Subject: Re: Ada Annex E (Just curious :-) References: <3AA29386.E60A686D@linuxchip.demon.co.uk> <980ekl$p4h$1@nh.pace.co.uk> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Date: Tue, 06 Mar 2001 01:24:40 +0000 NNTP-Posting-Host: 62.253.132.124 X-Complaints-To: abuse@ntlworld.com X-Trace: news11-gui.server.ntli.net 983841868 62.253.132.124 (Tue, 06 Mar 2001 01:24:28 GMT) NNTP-Posting-Date: Tue, 06 Mar 2001 01:24:28 GMT Organization: ntl Cablemodem News Service Xref: supernews.google.com comp.lang.ada:5448 Date: 2001-03-06T01:24:40+00:00 List-Id: Marin David Condic wrote: ... > I would agree that the lack of predictable latency makes it of somewhat > dubious value for realtime systems. ... I was thinking about the viability of using Annex E in a system with multiple microprocessors, sharing only part of their memory space. Suppose there was a coherent cache or multi-port memory, the Annex E implementation could work by referring to blocks of memory, making response times predictable, and performance high. Ideally, you could create a big data structure in shared memory, and access it from many partitions at once. If the memory pattern was entirely read-only, once created, each partition could locally cache the shared data, without serious time penalty for maintaining coherency. > Or possibly if you had multiple processors in a system that controlled > different hardware? Say, having a graphics processor to which you performed > RPC's to get certain things rendered? (Of course, this would require either > a very standardized processor/communications-interface or you'd never get > the compiler modified to suit the environment. :-) Funny you should say that... I was thinking of implementing rendering algorithms, using Annex E over shared memory. The performance I got from the little demo (over 100Mbps network, 100kB transfers) was disappointing though. I think hacking into the parameter marshaling code might sort that out. > It would seem that it might be useful for either computationally intensive > applications that lend themselves to distribution (I've seen it done with > CFD calculations) or database systems such as, say, teller machines that > want to verify a bank balance with a central computer before allowing a > withdrawal. I was thinking of the teller machines example as "controlling many remote peripherals". Each machine has its own local screen, keyboard, etc. and Annex E could be used to put a partition in each machine to control them. I don't think it would be considered a very practicable system though, since people want to implement each machine independently, using an agreed protocol, rather than unifying everything into a single 5000 partition program. How do you upgrade systems? Implement redundancy? etc. > Maybe its just the application domain you are usually involved in? Remember, > it is a "Special Needs Annex" and may just be the kind of thing that is more > common for a different problem domain. (I'd think it would be used heavily > in business applications where there was at most a soft-realtime > requirement.) I've been involved in several diverse domains. Embedded systems with hard realtime and soft realtime components and many peripherals seems most plausible use today. Take a mobile 'phone, for example - that might have hard realtime voiceband (maybe RF) DSP, as well as keyboard, display, power control etc. Currently, there would be a "standard" DSP, and a "standard" microcontroller, but with separate development groups, and an ad-hoc inter-processor communications protocol. Annex E could help here. In theory. -- Adrian Wrigley