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From: "Robert I. Eachus" <eachus@mitre.org>
Subject: Re: Context Switching
Date: 1999/05/11
Message-ID: <3738A31D.1013C463@mitre.org>#1/1
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Date: 1999-05-11T00:00:00+00:00
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Robert Dewar wrote:
 
> You have to be careful here. The raw hardware speed for a
> context switch is not what is interesting, what is interesting
> is the time for executing the COMPLETE pthread call that causes
> the context switch.
> 
> For example, the actual raw hardware speed for changing a task
> priority is probably just a single store instruction, but it may
> well take hundreds or even thousands of instructions to filter
> through the necessary kernel machinery to get to the point of
> issuing that store!
 
     Actually we have been finding on some modern microprocessors that
the (distributed) overhead of cache misses can dominate other costs.  On
others, where the cache is a "physical" cache that does not have to be
invalidated,
this overhead is very small.  I don't remember which chips are which
here, but there were some cases where the cache miss overhead tripled
the cost of a thread switch.

-- 

                                        Robert I. Eachus

with Standard_Disclaimer;
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