From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: ** X-Spam-Status: No, score=2.1 required=5.0 tests=BAYES_40,INVALID_MSGID, REPLYTO_WITHOUT_TO_CC autolearn=no autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 103376,5495dac456fa22ef X-Google-Attributes: gid103376,public X-Google-Thread: 115aec,5495dac456fa22ef X-Google-Attributes: gid115aec,public From: Marin David Condic Subject: Re: Processor Synchronization Date: 1999/01/21 Message-ID: <36A741A2.E3DB7BCE@pwfl.com>#1/1 X-Deja-AN: 435241211 Content-Transfer-Encoding: 7bit Sender: condicma@bogon.pwfl.com References: <36A509DB.95F62C0B@pwfl.com> <36A6DBB0.594A@wctc.net> Content-Type: text/plain; charset=us-ascii Organization: Pratt & Whitney Mime-Version: 1.0 Reply-To: diespammer@pwfl.com Newsgroups: comp.lang.ada,comp.realtime Date: 1999-01-21T00:00:00+00:00 List-Id: The Bohemian Monk wrote: > > After reading all the thread ... damn guys wake up. A processor as > simple as the 8088 has bus sync signals to allow multiple processors on > a single buss, or a single memory. Software does little for > multiprocessing, hardware does the most, unless you program embedded in > something like Forth. With non-buss-master processesors you can use a > PAL to envoke wait-states based on buss signals, all in hardware with > simple memory table semaphores for access control. > I'll try not to condescend, but boy is it tempting! :-) Our style of computer system for jet and rocket engines is not nearly that easy to do. The requirements won't allow for it. This box is strapped to the side of a really hot vibration generator and having it stop operating for any reason is considered "A Bad Thing". In the case of rockets, it is considered "A Really Bad Thing". And the rockets will take you out to where you can introduce your box to a bunch of gamma rays - just to make life interesting for your EEPROMs, etc., and to keep you appropriately humble. Due to the high reliability requirement, the systems are dual redundant and each channel has to be able to take immediate control if the other side is detected to have passed on to meet its maker. A real easy way to get in trouble and have to answer lots of embarrassing questions and probably start looking for a new career in the exciting world of the fast food industry is to have built completely redundant systems except for one common link - a clock or interrupt line for synchronization. If that chip or foil trace or wire should happen to break, all your dual redundancy was for naught. Hence, we have to pull some stunts to keep the two sides in synch. Anyway - if you know of any texts or papers discussing techniques for tightly synching two or more independent processors, please pass them along. Thanks. MDC -- Marin David Condic Real Time & Embedded Systems, Propulsion Systems Analysis United Technologies, Pratt & Whitney, Large Military Engines M/S 731-95, P.O.B. 109600, West Palm Beach, FL, 33410-9600 Ph: 561.796.8997 Fx: 561.796.4669 ***To reply, remove "bogon" from the domain name.*** "Airplanes are interesting toys but of no military value." -- Marechal Ferdinand Foch, Professor of Strategy, Ecole Superieure de Guerre.