Dear Sir/Mam,

I am applying for a full time job position of design engineer in your
company.

I am  currently pursuing a Master's degree in Electrical engineering
at Michigan Technological University and will be graduating in
July '98. I have been working with the VLSI group in MTU on various
modelling and design aspects of VLSI interconnections. I am also a teaching
assistant in Michigan tech.

My coursework at Michigan Tech and Vivekanand Institute of technology (my
undergraduate school) has prepared me well to contribute to your
organisation. My analytical and logical skills have been
sharpened by several design projects which are a part of the
course curriculum.

A strong personal work ethic, an outgoing personality, and a desire
to excel combined  with my work experience assures that I will be a
suitable candidate. A call to my references will assure that I have
the technical and interpersonal skills to make working enjoyable as
well as productive.

I have enclosed my resume with this letter and I would greatly
appreciate an oppurtunity to further discuss my qualifications with
you at your convenience. I can be reached by phone at "906-487-6154"
and also by e-mail at "udpainai@mtu.edu"

Thank you for your consideration. I look forward to hearing from you.

Sincerely,
Umesh Painaik
                           

       
  OBJECTIVE :
         Application for a design engineer position.   
   

  NAME                     : Umesh D. Painaik

  HOME ADDRESS             : 225 Hubbel St. ,apt 1
                             Houghton ,MI 49931-1533
                             phone- 906-487-6154

  WORK ADDRESS             : Michigan Technological University
                             1400 ,Townsend drive
                             Houghton ,MI 49931-1533

  E-Mail                   : udpainai@mtu.edu  


  EMPLOYMENT HISTORY       :1) Worked in Patni Computer Services as a Junior
                               Design Engineer from 2/96 to 8/96
                            2) Teaching Assistant at Michigan Tech. University
                               From 10/96 to till date.
                               Recitation in pspice network analysis, Magic and
                               VLSI design.


  EDUCATIONAL BACKGROUND   : 1)B.E. ELECTRONICS ,VESIT ,BOMBAY,1996. GPA 3.6
                             2)Currently in Second year M.S.E.E. with VLSI 
                               option in Michigan Tech univ.,GPA 3.7.


  ADDITIONAL SKILLS        : 1) Knowledge of VHDL,MAGIC,VIEWSIM,Schematics,
                                Verilog(Learning),Powerview,Xilinx
                                (Learning),Cadence Valid, Altera MAX+PLUS2,
                                Smartspice,Spice,Athena,Atlas,TCAD
                             2) Knowledge of C,HTML,Java(Learning),UNIX,DOS
                             3) Taken courses in 
                                -- Advanced electronic design
                                -- VLSI (GaAs)interconnections 
                                -- Advanced semiconductor physics
                                -- Advanced microprocessors and memory elements
                                -- Computer architecture
                                -- Digital signal processing
                                -- Digital communication
                                -- VLSI fabrication
                             3) Thesis topic- `Multisectional Interconnections'
                           
  
 RESEARCH BACKGROUND      : 1)  Project leader in Developing a `DRAM
                                Controller' using Powerview and viewsim in
                                undergrad.
                             2) Surveys on `SiC applications' and `Ion
                                implantation using Lasers'.
                             3) Research on `Frequency variance in High speed
                                semiconductor interconnections' in summer
                                97-98.
                             4) Developement and simulation of `DRAM
                                Controller' and 'Hamming decoder'using VHDL.
                             5) Currently working on CADENCE VALID and TCAD.
                             6) Currently working on a proposal topic
                                `High Speed Multisection interconnections and
                                 their feasibility'
 
 
  HONORS :                   1) Dean's list in two successive years in
                                undergraduate studies.
                             2) Best programmer's award in undergraduate studies.


  OTHER INTERESTS          : 1) Treasurer of Indian students association in 
                                Michigan Tech 
                             2) Student body President in Undergrad University.
                             3) Graduate Student Council member in Michigan Tech.
                             4) Member of the Soccer team.
                             5) Member of Worldwide Indian network. 

  VISA STATUS              : F1-Visa                    
  

  AVAILABILITY             : July 1998 (Willing to relocate)


  REFERENCES               : Available upon request