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From: stuffle@pcii.net (Kenneth W. Sodemann)
Subject: Re: floating point problem
Date: 1997/03/13
Message-ID: <33275cc2.412517674@news.mwci.net>#1/1
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References: <5f0faa$6ok@mtinsc04.worldnet.att.net>
 <331ace4d.1427558395@news.mwci.net> <dewar.857535729@merv>
 <1997Mar5.083938.1@eisner> <dewar.857586895@merv> <1997Mar6.080211.1@eisner>
 <dewar.857911706@merv> <5fvqkr$7n7@mulga.cs.mu.OZ.AU> <dewar.857974200@merv>
 <1997Mar10.074953.1@eisner> <dewar.858142750@merv>
Organization: MidWest Communications, Inc.
Newsgroups: comp.lang.ada
Date: 1997-03-13T00:00:00+00:00
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On 12 Mar 1997 00:00:30 -0500, dewar@merv.cs.nyu.edu (Robert Dewar)
wrote:

>Larry asks
>
><<So can anyone give an example for the Intel-challenged regarding how
>one would easily detect this float-challenged hardware at runtime in
>order to issue a nastygram ?>>
>
>The proper code is a little delicate, but is documented in the relevant
>Intel microprocessor manuals. Note that all DX chips,

Almost true.  All DX 486 chips have built in FPUs.  On the 386, the
SX/DX designation meant something else all together (external bus data
size).  You needed the 80387 co-processor for floating point.

>and of course all
>Pentiums have built-in floating-point, so this is really only a concern
>with ancient machines that you cannot purchase any longer.
>

Agreed with new machines.  However, there are tons of older 386 and
486SX machines floating around out there still being used without the
floating point unit.
--
Ken Sodemann
stuffle@pcii.net
http://users.mwci.net/~stuffle