From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on polar.synack.me X-Spam-Level: X-Spam-Status: No, score=0.1 required=5.0 tests=BAYES_05,INVALID_MSGID autolearn=no autolearn_force=no version=3.4.4 X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: fc89c,e2e7624a3542400a X-Google-Attributes: gidfc89c,public X-Google-Thread: 109fba,e2e7624a3542400a X-Google-Attributes: gid109fba,public X-Google-Thread: 1014db,e2e7624a3542400a X-Google-Attributes: gid1014db,public X-Google-Thread: 1089ad,e2e7624a3542400a X-Google-Attributes: gid1089ad,public X-Google-Thread: 103376,e2e7624a3542400a X-Google-Attributes: gid103376,public From: Simon Davidmann Subject: Re: Software reuse Date: 1996/08/14 Message-ID: <3211C0DD.3DAC@vchips.com>#1/1 X-Deja-AN: 174116173 x-nntp-posting-host: his-home.demon.co.uk references: <320EF9AB.42877E5C@sh.bel.alcatel.be> <3210AA4B.2578@tus.ssi1.com> cc: kathleenl@vchips.com, simond@vchips.com content-type: text/plain; charset=us-ascii organization: Virtual Chips, Inc. mime-version: 1.0 newsgroups: comp.lang.c,comp.lang.c++,comp.unix.programmer,comp.lang.ada,comp.lang.vhdl x-mailer: Mozilla 2.01 (Win95; U) Date: 1996-08-14T00:00:00+00:00 List-Id: Erik Jessen wrote: > > P. Cnudde VH14 (8218) wrote: > > > > A lot of people talk about reuse but does anybody have experience > > with a company wide reuse system. Not only different development > > teams but also different locations should be supported. > > > > > > PS. Does anybody in comp.lang.vhdl tried real reuse using VHDL. > Some practical notes: > > 2) I think the only practical way to get reuse to happen is to have a separate modelling > group that either develops reusable blocks from the ground up, or takes blocks > built by other groups, and "packages" them with documentation, etc. to make > them reusable. You need people to have simple goals. For designers, it should > be "make it fast, make it right". For library people, it should be "make it > reusable". In terms of hardware IC design I agree with this - and in fact have seen that for some specific technology areas groups of specialists with one focus will build blocks - specifically for reuse by many people - and will build a business from it. This is where Virtual Chips ( http://www.chips.com ) came from - originally from a consulting business - with a focus of building library components - but has evolved to focus on building synthesizable logic blocks (synthesizable bus interfaces for PCI, USB, AGP etc) for use by many people - and these come with the RTL design itself, the documentation (like a standard IC datasheet), synthesis scripts, and layout information - ie everything needed to get the design onto silicon. I see a new industry evolving - focused on design reuse - individual companies may not be able to afford to build blocks for internal reuse (cost to design for reuse may be upto 5X regular cost) - it will need outside expert teams - who can spread the development cost amongs many customers. And this new industry will need new tools, new companies - and most importantly new relationships between supplier and customer - to license such technologies. The RAPID industry association ( http://www.rapid.org ) is being formed to address these issues. Of course there are also all the issues related to the new EDA tools that will be needed for the reusable logic authors and the reusable logic consumers. These too need addressing. Simon Davidmann Virtual Chips Europe. http://www.chips.com